test: feproto.h Source File

00001 /****************************** 00002 Intel Confidential 00003 ******************************/ 00004 00005 #ifndef _EM_PROTOTYPES_H 00006 #define _EM_PROTOTYPES_H 00007 00008 #ifndef INLINE 00009 #define INLINE 00010 #endif 00011 00012 #if !(defined(BIG_ENDIAN) || defined(LITTLE_ENDIAN)) 00013 #error Endianness not established; define BIG_ENDIAN or LITTLE_ENDIAN 00014 #endif 00015 00016 00017 /**********************************************/ 00018 /* Assembler Supported Instruction Prototypes */ 00019 /**********************************************/ 00020 00021 /* Floating-point Absolute Maximum */ 00022 void 00023 fp82_famax(EM_state_type *ps, 00024 EM_opcode_sf_type sf, 00025 EM_pred_reg_specifier qp, 00026 EM_fp_reg_specifier f1, 00027 EM_fp_reg_specifier f2, 00028 EM_fp_reg_specifier f3); 00029 00030 /* Floating-point Parallel Absolute Maximum */ 00031 00032 void 00033 fp82_fpamax(EM_state_type *ps, 00034 EM_opcode_sf_type sf, 00035 EM_pred_reg_specifier qp, 00036 EM_fp_reg_specifier f1, 00037 EM_fp_reg_specifier f2, 00038 EM_fp_reg_specifier f3); 00039 00040 /* Floating-point Absolute Minimum */ 00041 void 00042 fp82_famin(EM_state_type *ps, 00043 EM_opcode_sf_type sf, 00044 EM_pred_reg_specifier qp, 00045 EM_fp_reg_specifier f1, 00046 EM_fp_reg_specifier f2, 00047 EM_fp_reg_specifier f3); 00048 00049 00050 /* Floating-point Parallel Absolute Minimum */ 00051 00052 void 00053 fp82_fpamin(EM_state_type *ps, 00054 EM_opcode_sf_type sf, 00055 EM_pred_reg_specifier qp, 00056 EM_fp_reg_specifier f1, 00057 EM_fp_reg_specifier f2, 00058 EM_fp_reg_specifier f3); 00059 00060 00061 /* Floating-point Compare */ 00062 00063 void 00064 fp82_fcmp_eq(EM_state_type *ps, 00065 EM_opcode_ctype_type ctype, 00066 EM_opcode_sf_type sf, 00067 EM_pred_reg_specifier qp, 00068 EM_pred_reg_specifier p1, 00069 EM_pred_reg_specifier p2, 00070 EM_fp_reg_specifier f2, 00071 EM_fp_reg_specifier f3); 00072 00073 void 00074 fp82_fcmp_lt(EM_state_type *ps, 00075 EM_opcode_ctype_type ctype, 00076 EM_opcode_sf_type sf, 00077 EM_pred_reg_specifier qp, 00078 EM_pred_reg_specifier p1, 00079 EM_pred_reg_specifier p2, 00080 EM_fp_reg_specifier f2, 00081 EM_fp_reg_specifier f3); 00082 00083 void 00084 fp82_fcmp_le(EM_state_type *ps, 00085 EM_opcode_ctype_type ctype, 00086 EM_opcode_sf_type sf, 00087 EM_pred_reg_specifier qp, 00088 EM_pred_reg_specifier p1, 00089 EM_pred_reg_specifier p2, 00090 EM_fp_reg_specifier f2, 00091 EM_fp_reg_specifier f3); 00092 00093 00094 void 00095 fp82_fcmp_unord(EM_state_type *ps, 00096 EM_opcode_ctype_type ctype, 00097 EM_opcode_sf_type sf, 00098 EM_pred_reg_specifier qp, 00099 EM_pred_reg_specifier p1, 00100 EM_pred_reg_specifier p2, 00101 EM_fp_reg_specifier f2, 00102 EM_fp_reg_specifier f3); 00103 00104 00105 /* Floating-point Paralel Compare */ 00106 00107 void 00108 fp82_fpcmp_eq(EM_state_type *ps, 00109 EM_opcode_sf_type sf, 00110 EM_pred_reg_specifier qp, 00111 EM_fp_reg_specifier f1, 00112 EM_fp_reg_specifier f2, 00113 EM_fp_reg_specifier f3); 00114 00115 void 00116 fp82_fpcmp_lt(EM_state_type *ps, 00117 EM_opcode_sf_type sf, 00118 EM_pred_reg_specifier qp, 00119 EM_fp_reg_specifier f1, 00120 EM_fp_reg_specifier f2, 00121 EM_fp_reg_specifier f3); 00122 00123 void 00124 fp82_fpcmp_le(EM_state_type *ps, 00125 EM_opcode_sf_type sf, 00126 EM_pred_reg_specifier qp, 00127 EM_fp_reg_specifier f1, 00128 EM_fp_reg_specifier f2, 00129 EM_fp_reg_specifier f3); 00130 00131 void 00132 fp82_fpcmp_unord(EM_state_type *ps, 00133 EM_opcode_sf_type sf, 00134 EM_pred_reg_specifier qp, 00135 EM_fp_reg_specifier f1, 00136 EM_fp_reg_specifier f2, 00137 EM_fp_reg_specifier f3); 00138 00139 void 00140 fp82_fpcmp_neq(EM_state_type *ps, 00141 EM_opcode_sf_type sf, 00142 EM_pred_reg_specifier qp, 00143 EM_fp_reg_specifier f1, 00144 EM_fp_reg_specifier f2, 00145 EM_fp_reg_specifier f3); 00146 00147 void 00148 fp82_fpcmp_nlt(EM_state_type *ps, 00149 EM_opcode_sf_type sf, 00150 EM_pred_reg_specifier qp, 00151 EM_fp_reg_specifier f1, 00152 EM_fp_reg_specifier f2, 00153 EM_fp_reg_specifier f3); 00154 00155 void 00156 fp82_fpcmp_nle(EM_state_type *ps, 00157 EM_opcode_sf_type sf, 00158 EM_pred_reg_specifier qp, 00159 EM_fp_reg_specifier f1, 00160 EM_fp_reg_specifier f2, 00161 EM_fp_reg_specifier f3); 00162 00163 void 00164 fp82_fpcmp_ord(EM_state_type *ps, 00165 EM_opcode_sf_type sf, 00166 EM_pred_reg_specifier qp, 00167 EM_fp_reg_specifier f1, 00168 EM_fp_reg_specifier f2, 00169 EM_fp_reg_specifier f3); 00170 00171 00172 /* Convert Floating-point to Integer */ 00173 00174 void 00175 fp82_fcvt_fx(EM_state_type *ps, 00176 EM_opcode_sf_type sf, 00177 EM_pred_reg_specifier qp, 00178 EM_fp_reg_specifier f1, 00179 EM_fp_reg_specifier f2); 00180 00181 void 00182 fp82_fcvt_fx_trunc(EM_state_type *ps, 00183 EM_opcode_sf_type sf, 00184 EM_pred_reg_specifier qp, 00185 EM_fp_reg_specifier f1, 00186 EM_fp_reg_specifier f2); 00187 00188 void 00189 fp82_fcvt_fxu(EM_state_type *ps, 00190 EM_opcode_sf_type sf, 00191 EM_pred_reg_specifier qp, 00192 EM_fp_reg_specifier f1, 00193 EM_fp_reg_specifier f2); 00194 00195 void 00196 fp82_fcvt_fxu_trunc(EM_state_type *ps, 00197 EM_opcode_sf_type sf, 00198 EM_pred_reg_specifier qp, 00199 EM_fp_reg_specifier f1, 00200 EM_fp_reg_specifier f2); 00201 00202 00203 /* Parallel Convert Floating-point to Integer */ 00204 00205 void 00206 fp82_fpcvt_fx(EM_state_type *ps, 00207 EM_opcode_sf_type sf, 00208 EM_pred_reg_specifier qp, 00209 EM_fp_reg_specifier f1, 00210 EM_fp_reg_specifier f2); 00211 00212 void 00213 fp82_fpcvt_fx_trunc(EM_state_type *ps, 00214 EM_opcode_sf_type sf, 00215 EM_pred_reg_specifier qp, 00216 EM_fp_reg_specifier f1, 00217 EM_fp_reg_specifier f2); 00218 00219 void 00220 fp82_fpcvt_fxu(EM_state_type *ps, 00221 EM_opcode_sf_type sf, 00222 EM_pred_reg_specifier qp, 00223 EM_fp_reg_specifier f1, 00224 EM_fp_reg_specifier f2); 00225 00226 void 00227 fp82_fpcvt_fxu_trunc(EM_state_type *ps, 00228 EM_opcode_sf_type sf, 00229 EM_pred_reg_specifier qp, 00230 EM_fp_reg_specifier f1, 00231 EM_fp_reg_specifier f2); 00232 00233 00234 00235 /* Floating-point Multiply Add */ 00236 00237 void 00238 fp82_fma(EM_state_type *ps, 00239 EM_opcode_pc_type pc, 00240 EM_opcode_sf_type sf, 00241 EM_pred_reg_specifier qp, 00242 EM_fp_reg_specifier f1, 00243 EM_fp_reg_specifier f3, 00244 EM_fp_reg_specifier f4, 00245 EM_fp_reg_specifier f2); 00246 00247 00248 /* Floating Point Parallel Multiply Add */ 00249 void 00250 fp82_fpma(EM_state_type *ps, 00251 EM_opcode_sf_type sf, 00252 EM_pred_reg_specifier qp, 00253 EM_fp_reg_specifier f1, 00254 EM_fp_reg_specifier f3, 00255 EM_fp_reg_specifier f4, 00256 EM_fp_reg_specifier f2); 00257 00258 00259 /* Floating-point Maximum */ 00260 void 00261 fp82_fmax(EM_state_type *ps, 00262 EM_opcode_sf_type sf, 00263 EM_pred_reg_specifier qp, 00264 EM_fp_reg_specifier f1, 00265 EM_fp_reg_specifier f2, 00266 EM_fp_reg_specifier f3); 00267 00268 00269 /* Floating-point Parallel Maximum */ 00270 void 00271 fp82_fpmax(EM_state_type *ps, 00272 EM_opcode_sf_type sf, 00273 EM_pred_reg_specifier qp, 00274 EM_fp_reg_specifier f1, 00275 EM_fp_reg_specifier f2, 00276 EM_fp_reg_specifier f3); 00277 00278 /* Floating-point Minimum */ 00279 void 00280 fp82_fmin(EM_state_type *ps, 00281 EM_opcode_sf_type sf, 00282 EM_pred_reg_specifier qp, 00283 EM_fp_reg_specifier f1, 00284 EM_fp_reg_specifier f2, 00285 EM_fp_reg_specifier f3); 00286 00287 00288 /* Floating-point Parallel Minimum */ 00289 void 00290 fp82_fpmin(EM_state_type *ps, 00291 EM_opcode_sf_type sf, 00292 EM_pred_reg_specifier qp, 00293 EM_fp_reg_specifier f1, 00294 EM_fp_reg_specifier f2, 00295 EM_fp_reg_specifier f3); 00296 00297 00298 /* Floating-point Multiply Subtract */ 00299 void 00300 fp82_fms(EM_state_type *ps, 00301 EM_opcode_pc_type pc, 00302 EM_opcode_sf_type sf, 00303 EM_pred_reg_specifier qp, 00304 EM_fp_reg_specifier f1, 00305 EM_fp_reg_specifier f3, 00306 EM_fp_reg_specifier f4, 00307 EM_fp_reg_specifier f2); 00308 00309 00310 /* Floating-point Parallel Multiply Subtract */ 00311 void 00312 fp82_fpms(EM_state_type *ps, 00313 EM_opcode_sf_type sf, 00314 EM_pred_reg_specifier qp, 00315 EM_fp_reg_specifier f1, 00316 EM_fp_reg_specifier f3, 00317 EM_fp_reg_specifier f4, 00318 EM_fp_reg_specifier f2); 00319 00320 00321 00322 /* Floating-point Negative Multiply Add */ 00323 void 00324 fp82_fnma(EM_state_type *ps, 00325 EM_opcode_pc_type pc, 00326 EM_opcode_sf_type sf, 00327 EM_pred_reg_specifier qp, 00328 EM_fp_reg_specifier f1, 00329 EM_fp_reg_specifier f3, 00330 EM_fp_reg_specifier f4, 00331 EM_fp_reg_specifier f2); 00332 00333 00334 /* Floating-point Parallel Negative Multiply Add */ 00335 00336 void 00337 fp82_fpnma(EM_state_type *ps, 00338 EM_opcode_sf_type sf, 00339 EM_pred_reg_specifier qp, 00340 EM_fp_reg_specifier f1, 00341 EM_fp_reg_specifier f3, 00342 EM_fp_reg_specifier f4, 00343 EM_fp_reg_specifier f2); 00344 00345 00346 /* Floating-point Reciprocal Approximation */ 00347 void 00348 fp82_frcpa(EM_state_type *ps, 00349 EM_opcode_sf_type sf, 00350 EM_pred_reg_specifier qp, 00351 EM_fp_reg_specifier f1, 00352 EM_pred_reg_specifier p2, 00353 EM_fp_reg_specifier f2, 00354 EM_fp_reg_specifier f3); 00355 00356 /* Floating-point Parallel Reciprocal Approximation */ 00357 void 00358 fp82_fprcpa(EM_state_type *ps, 00359 EM_opcode_sf_type sf, 00360 EM_pred_reg_specifier qp, 00361 EM_fp_reg_specifier f1, 00362 EM_pred_reg_specifier p2, 00363 EM_fp_reg_specifier f2, 00364 EM_fp_reg_specifier f3); 00365 00366 /* Floating-point Reciprocal Square Root Approximation */ 00367 void 00368 fp82_frsqrta(EM_state_type *ps, 00369 EM_opcode_sf_type sf, 00370 EM_pred_reg_specifier qp, 00371 EM_fp_reg_specifier f1, 00372 EM_pred_reg_specifier p2, 00373 EM_fp_reg_specifier f3); 00374 00375 00376 /* Floating-point Parallel Reciprocal Square Root Approximation */ 00377 void 00378 fp82_fprsqrta(EM_state_type *ps, 00379 EM_opcode_sf_type sf, 00380 EM_pred_reg_specifier qp, 00381 EM_fp_reg_specifier f1, 00382 EM_pred_reg_specifier p2, 00383 EM_fp_reg_specifier f3); 00384 00385 00386 /******************************************************************************/ 00387 /* Define macros to simplify access to the fp82_ functions. This is done so */ 00388 /* the namespace doesn't get cluttered, while retaining convenient access. */ 00389 /* The FP82_NO_SHORTCUTS macro can be defined to prevent creation of these. */ 00390 /******************************************************************************/ 00391 00392 #ifndef FP82_NO_SHORTCUTS 00393 #define famax fp82_famax 00394 #define fpamax fp82_fpamax 00395 #define famin fp82_famin 00396 #define fpamin fp82_fpamin 00397 00398 #define fcmp_eq fp82_fcmp_eq 00399 #define fcmp_lt fp82_fcmp_lt 00400 #define fcmp_le fp82_fcmp_le 00401 #define fcmp_unord fp82_fcmp_unord 00402 00403 #define fpcmp_eq fp82_fpcmp_eq 00404 #define fpcmp_lt fp82_fpcmp_lt 00405 #define fpcmp_le fp82_fpcmp_le 00406 #define fpcmp_unord fp82_fpcmp_unord 00407 #define fpcmp_neq fp82_fpcmp_neq 00408 #define fpcmp_nlt fp82_fpcmp_nlt 00409 #define fpcmp_nle fp82_fpcmp_nle 00410 #define fpcmp_ord fp82_fpcmp_ord 00411 00412 #define fcvt_fx fp82_fcvt_fx 00413 #define fcvt_fx_trunc fp82_fcvt_fx_trunc 00414 #define fcvt_fxu fp82_fcvt_fxu 00415 #define fcvt_fxu_trunc fp82_fcvt_fxu_trunc 00416 00417 #define fpcvt_fxu_trunc fp82_fpcvt_fxu_trunc 00418 #define fpcvt_fxu fp82_fpcvt_fxu 00419 #define fpcvt_fx fp82_fpcvt_fx 00420 #define fpcvt_fx_trunc fp82_fpcvt_fx_trunc 00421 00422 00423 #define fma fp82_fma 00424 #define fpma fp82_fpma 00425 #define fmax fp82_fmax 00426 #define fpmax fp82_fpmax 00427 #define fmin fp82_fmin 00428 #define fpmin fp82_fpmin 00429 #define fms fp82_fms 00430 #define fpms fp82_fpms 00431 #define fnma fp82_fnma 00432 #define fpnma fp82_fpnma 00433 #define frcpa fp82_frcpa 00434 #define fprcpa fp82_fprcpa 00435 #define frsqrta fp82_frsqrta 00436 #define fprsqrta fp82_fprsqrta 00437 00438 #endif /* FP82_NO_SHORTCUTS */ 00439 00440 00441 #endif /* _EM_PROTOTYPES_H */ 00442